CMOS Backplane for LEDoS

Feature

Pixel size as small as 2.5um
Active-matrix architecture
PWM Driving scheme with MiP®(Memory-inside-Pixel)
Independent R/G/B control
Low power design
De-Mura compensation
Over-temperature protection
MIPI D-Phy/C-Phy Interface IP
28nm FD-SOI CMOS Process
Wafer-to-wafer bonding ready

Product Information

Product Code Product Description Display Resolution Pixel Picth[㎛] Polarity Video I/O Initerface
S22MM21RGB CMOS BP1280RGB x 7204.95Common-cathodeMIPI
S22MM22MONO CMOS BP1280 x 7204.95Common-cathodeMIPI